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???
12/06/12 15:02
Modified:
  12/06/12 15:08

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#188971 - It IS disturbing!
Responding to: ???'s previous message
I know, you don't like ATMEL and their ATMEGAs and ATtinys. Well, I'm "forced" by my boss to use them for some good reasons. If you would have a look into the datasheet of ATtiny25 you would see two different specifications, one "standard power-on reset" for earlier manufactured ATtiny25 and another "enhanced power-on reset" for newer models. They differ from each other in the power-on slope rate and the maximum initial Vcc voltage before an power-up. Newer ones need an initial voltage of under 0.6V, but earlier parts needed an initial voltage of under 0.05V!

I bring the example with this "hateful" ATtiny25 because there are many other micros suffering from the same problem. I remember an errata from a Philips' P89LP9XX which stated, that Vcc must fall down to 0V to make the POR work properly on the next power-up.

These examples demonstrate, that this WAS an issue for flash memory micros in the past. And I suspect it IS an issue still.

The ATMEGA328 (I'm also forced to use...) contains the newest POR and BOR topology, the most enhanced one of the ATMEGA family. But you can easily prompt a code memory corruption by disabling the BOR: Whenever Vcc rises too slowly the micro runs ill and refuses to work properly. Latch-up, lock-up and code memory corruption are the consequences.

POR usually works only like a monoflop: Once triggered when Vcc reaches a certain limit a monoflop is started which withdraws the reset signal after an adjustable time. But POR doesn't supervise Vcc, by no means! Only the activatd BOR does this. But the BOR only works when it is initialised by a proper POR. That is the reason why it is so important to have a controlled power-up with a controlled slope-rate and a Vcc starting from 0V on.

Problems during power-down, like you reported, cannot be solved by a simple way, I suspect. You can only hope, that the BOR introdudes early enough and long enough until Vcc falls under the minimum voltage needed to generate a dangerous programming voltage and to start the fatal ill-programming.

I have carried out very intensive testing with power-downs where Vcc falls very slowly and I have never experienced trouble with the ATMEGA328. I'm I sure that everything is fine now? No!

Richard, may be you should take a micro that is not ISP-capable to solve the problem of code memory corruptions?? But you are still in danger to suffer from latch-up and look-up and destroy the micro in another way...

Kai Klaas

List of 33 messages in thread
TopicAuthorDate
C8051F231 experiences            01/01/70 00:00      
   another solution            01/01/70 00:00      
   The probabilities are low...            01/01/70 00:00      
      think about what happens when you add a finger            01/01/70 00:00      
         The point is ...            01/01/70 00:00      
            Yes ... the underlying issue is the flash ...             01/01/70 00:00      
               Out of my office, but...            01/01/70 00:00      
                  Don't think in Vcc, ESD or hum...            01/01/70 00:00      
   Apparently several C8051F2xx parts have the same pinout            01/01/70 00:00      
   Characteristic for in system programmable flash micros...            01/01/70 00:00      
      All too true ... sadly ...             01/01/70 00:00      
         Power-on slope rate...            01/01/70 00:00      
            Sorry, my post should be here, no up there...            01/01/70 00:00      
            Have you any basis for that rate?            01/01/70 00:00      
               Vdd ramp time            01/01/70 00:00      
               Some datasheets show numbers...            01/01/70 00:00      
                  Those aren't the "usual" 805x-core MCU's            01/01/70 00:00      
                     There aren't many "usual" 8051-cores anymore...            01/01/70 00:00      
                        How dangerous power ups can be...            01/01/70 00:00      
                           I believe it            01/01/70 00:00      
                              (dV/dt) examples            01/01/70 00:00      
                                 They don't know it either...            01/01/70 00:00      
                                    dV/dT etc             01/01/70 00:00      
                                       reset request...            01/01/70 00:00      
                                          That's what disturbs me greatly            01/01/70 00:00      
                                             It IS disturbing!            01/01/70 00:00      
                                                Where this began ... at least for me ...             01/01/70 00:00      
                                                   So, you took the hard road...            01/01/70 00:00      
                                                      We've all had that experience             01/01/70 00:00      
   probable cause            01/01/70 00:00      
      Brent, this is very nice            01/01/70 00:00      
         forum no longer down            01/01/70 00:00      
      Thank you!            01/01/70 00:00      

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