| ??? 01/04/08 18:36 Read: times |
#149057 - determinism of the cache Responding to: ???'s previous message |
At the end of the day, the behaviour of the jump-cache CAN be determined - it's just not that easy if you have many jumps - with interrupts and MOVCs in the picture gets even more complex, although these can be disabled from being cached.
If the total number of jumps (including call/ret) you have in your software is below the number of cache positions (in the silabs, 63, it's quite a lot - how many of the 256 NOP positions did you actually use?), after going through ALL of them, the jumps are then deterministic, but there might be some issues with the NOPs very close to the indirect jump...(?) JW |
| Topic | Author | Date |
| Number of CPU cycle for 8051 function call | 01/01/70 00:00 | |
| Do it in assembler | 01/01/70 00:00 | |
| Delay functions | 01/01/70 00:00 | |
| A related trick | 01/01/70 00:00 | |
| Offset | 01/01/70 00:00 | |
| Offset | 01/01/70 00:00 | |
| Sure | 01/01/70 00:00 | |
| Over Drive? | 01/01/70 00:00 | |
| a refinement | 01/01/70 00:00 | |
| NOPs are so bad waste of space... | 01/01/70 00:00 | |
| waste of space... waste of time | 01/01/70 00:00 | |
| fixed delay | 01/01/70 00:00 | |
| Variable delay | 01/01/70 00:00 | |
| determinism of the cache | 01/01/70 00:00 | |
| there are no cache misses in 'linear code' | 01/01/70 00:00 | |
| I got only ONE cache miss... | 01/01/70 00:00 | |
| Old Keil Thread | 01/01/70 00:00 | |
| What about a Delay like this. | 01/01/70 00:00 | |
| No, it won't. | 01/01/70 00:00 | |
| Ok. | 01/01/70 00:00 | |
| also | 01/01/70 00:00 | |
| Also ... | 01/01/70 00:00 | |
| Actually... | 01/01/70 00:00 | |
| will. | 01/01/70 00:00 | |
| ANSI C | 01/01/70 00:00 | |
Keil option: Disable ANSI casts | 01/01/70 00:00 | |
| typo. | 01/01/70 00:00 |