| ??? 01/04/08 18:16 Read: times |
#149056 - there are no cache misses in 'linear code' Responding to: ???'s previous message |
I don't see the point. I believe the jump-caching processor such as the fast silabs-s and upsd3xxx-s cache the "jmp @a+dptr"-s, too, so you have the same degree of uncertainty in using this method as in a djnz loop.
If you use the JMP@ you will get 2 cache misses (the call to the routine and the jmp@, but THAT is a constant) there are NO cache misses in 'linear code' i.e. the setup and the string of NOPs. If you use the djnz you do not have the foggiest idea how many cache misses you get. Of course, you COULD use the cache lock. Erik |
| Topic | Author | Date |
| Number of CPU cycle for 8051 function call | 01/01/70 00:00 | |
| Do it in assembler | 01/01/70 00:00 | |
| Delay functions | 01/01/70 00:00 | |
| A related trick | 01/01/70 00:00 | |
| Offset | 01/01/70 00:00 | |
| Offset | 01/01/70 00:00 | |
| Sure | 01/01/70 00:00 | |
| Over Drive? | 01/01/70 00:00 | |
| a refinement | 01/01/70 00:00 | |
| NOPs are so bad waste of space... | 01/01/70 00:00 | |
| waste of space... waste of time | 01/01/70 00:00 | |
| fixed delay | 01/01/70 00:00 | |
| Variable delay | 01/01/70 00:00 | |
| determinism of the cache | 01/01/70 00:00 | |
| there are no cache misses in 'linear code' | 01/01/70 00:00 | |
| I got only ONE cache miss... | 01/01/70 00:00 | |
| Old Keil Thread | 01/01/70 00:00 | |
| What about a Delay like this. | 01/01/70 00:00 | |
| No, it won't. | 01/01/70 00:00 | |
| Ok. | 01/01/70 00:00 | |
| also | 01/01/70 00:00 | |
| Also ... | 01/01/70 00:00 | |
| Actually... | 01/01/70 00:00 | |
| will. | 01/01/70 00:00 | |
| ANSI C | 01/01/70 00:00 | |
Keil option: Disable ANSI casts | 01/01/70 00:00 | |
| typo. | 01/01/70 00:00 |