| ??? 09/26/12 10:09 Read: times |
#188458 - SRAM issues |
We have a old product that using a 68k series CPU and an 8051 type controller, the two chips communicate via shared SRAM and with a hardware bus attribution circuit. The supplier changed the SRAM to a lower power and faster ( was 70nS, the new one is 45nS) chip, and we started to have problem with the product. We found that replacing the chip with the old stock and the issue goes away. We checked the signals and seems all clean. Any suggestion what to look for? Any ideas are welcome.
Thanks |
| Topic | Author | Date |
| SRAM issues | 01/01/70 00:00 | |
| Setup and hold times? | 01/01/70 00:00 | |
| RAM issues | 01/01/70 00:00 | |
| Or narrow pulses ? | 01/01/70 00:00 | |
| Address setup time | 01/01/70 00:00 | |
| did you change the arbitration? | 01/01/70 00:00 | |
| Ram issues | 01/01/70 00:00 | |
| P0, P2 for memory only, or ... | 01/01/70 00:00 | |
| p0 and p2 | 01/01/70 00:00 | |
| If you latch both P0 and P2, there will be stabile A15-A0 | 01/01/70 00:00 | |
| Arbitration circuit | 01/01/70 00:00 | |
| It's a bit tricky synchronizing an 805x with 68k series | 01/01/70 00:00 | |
| you are using a latch, and not a flipflop, right? | 01/01/70 00:00 | |
| FF or latch | 01/01/70 00:00 | |
| It's a mistake I've seen a time or two ... | 01/01/70 00:00 | |
| time wasting | 01/01/70 00:00 | |
| no circuit diagram | 01/01/70 00:00 | |
You don't have to do that | 01/01/70 00:00 |