I sort of like to use a flipflop with an XOR driving its clock. The inputs to the xor are the Q of the flipflop and the incoming signal. This will result in a transition on the Q each time there's a transition on the input clock, not the Y of the xor. The prop-delay (clock-to-Q) of the FF will be the rate-determining step, i.e. the pulse width of the output pulse, as the xor is normally a bit faster than the flipflop. The flipflop prevents the xor from driving it into metastability, AFAIK, though you should look for such things. The 7 volt output will be very short, so you can create it with a FET driven by the flipflop. Probably a p-channel driven by /Q will do.

You can also try the xor alone as I previously mentioned. The key, of course, is that the AC logic isn't supposed to run up to 7 volts, but ... and it is a but ... you can probably get by with this because the pulse is short and infrequent.

Let me know how it works out for you.

RE